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dc.contributor.authorYardi, Shrirang Madhav
dc.date.accessioned2014-03-03T21:04:29Z
dc.date.available2014-03-03T21:04:29Z
dc.date.issued2003-08
dc.identifier.otheryardi_shrirang_m_200308_ms
dc.identifier.urihttp://purl.galileo.usg.edu/uga_etd/yardi_shrirang_m_200308_ms
dc.identifier.urihttp://hdl.handle.net/10724/21220
dc.description.abstractHardware support for floating-point intensive applications like multimedia and graphics processing is rapidly gaining importance. The use of add-on cards for graphics processing, image rendering and 3D acceleration are now common even in home PCs. Recently, reconfigurable systems, in the form of FPGAs, have gained popularity in construction of such specialized hardware. In this work, we take a look at a particular class of applications involving highly computationally-intense iterative floating-point algortithms for solving large sparse linear systems and present a case for achieving improvement in their execution by using a Custom Integrated Circuit. Our design uses novel methods to overcome precision and numerical instability problems that arise in earlier implementations which used FPGAs. Our design consists of an add-on card which contains a custom Reconfigurable Integrated Circuit with multiple processors on a single die. We believe that our system is the first of its kind to use these algorithms for solving large sparse linear systems in real-time. The cost-effectiveness and computational power provided by our system will allow applications like real-time object modeling, fluid flow modeling and animation to be run even on home PCs by using this add-on card.
dc.languageeng
dc.publisheruga
dc.rightspublic
dc.subjectfloating point intensive
dc.subjectcustom integrated circuit (IC)
dc.subjectphysically-based modeling
dc.subjectreconfigurable system
dc.subjectstandard cell-based VLSI design flow
dc.titleA reconfigurable multi-processor custom integrated circuit for floating point intensive algorithms
dc.typeThesis
dc.description.degreeMS
dc.description.departmentComputer Science
dc.description.majorComputer Science
dc.description.advisorJeffery W. Smith
dc.description.committeeJeffery W. Smith
dc.description.committeeKhaled Rasheed
dc.description.committeeThiab Taha


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